Electronic circuits, such as integrated microcircuits, are used in a variety of products, from automobiles to microwaves to personal computers. Designing and fabricating microcircuit devices typically involves many steps, sometimes referred to as the “design flow.” The particular steps of a design flow often are dependent upon the type of microcircuit, its complexity, the design team, and the microcircuit fabricator or foundry that will manufacture the microcircuit. Typically, software and hardware “tools” verify the design at various stages of the design flow by running software simulators and/or hardware emulators. These steps aid in the discovery of errors in the design, and allow the designers and engineers to correct or otherwise improve the design. These various microcircuits are often referred to as integrated circuits (IC's).
Several steps are common to most design flows. Initially, the specification for a new circuit is transformed into a logical design, sometimes referred to as a register transfer level (RTL) description of the circuit. With this logical design, the circuit is described in terms of both the exchange of signals between hardware registers and the logical operations that are performed on those signals. The logical design typically employs a Hardware Design Language (HDL), such as the Very high speed integrated circuit Hardware Design Language (VHDL). The logic of the circuit is then analyzed, to confirm that it will accurately perform the functions desired for the circuit, i.e. that the logical design conforms to the specification. This analysis is sometimes referred to as “formal verification.”
After the logical design is verified, it is converted into a device design by synthesis software. The device design, which is typically in the form of a schematic or netlist, describes the specific electronic devices (such as transistors, resistors, and capacitors) that will be used in the circuit, along with their interconnections. This device design generally corresponds to the level of representation displayed in conventional circuit diagrams. The relationships between the electronic devices are then analyzed, often mathematically, to confirm that the circuit described by the device design conforms to the logical design, and as a result, the specification. This analysis is also sometimes referred to as formal verification.
Once the components and their interconnections are established, the design is again transformed, this time into a physical design that describes specific geometric elements. The geometric elements, which typically are polygons, define the shapes that will be created in various layers of material to manufacture the circuit. This type of design often is referred to as a “layout” design. The layout design is then used as a template to manufacture the integrated circuit. More particularly, the integrated circuit devices are manufactured, by for example an optical lithographic process, using the layout design as a template.
As indicated above, device designs may often be in the form of either a schematic or a netlist. As those of skill in the art can appreciate, a netlist details the parts, often referred to as hardware components, which make up a device design. In addition to listing the hardware components included in a device design, a netlist details the connectivity of the device design. Netlists are typically text based, and is often quite literally a list of the components and connections between the components of the device design.
Due to the complexity of modern electronic device designs, a device is not easily visualized by the designer from the netlist alone. As a result, tools are available that generate a schematic from a netlist. However, with the growing complexity of modern designs it has become increasing difficult to generate a schematic from a netlist that is “useful” to the designer. This is particularly true where the netlist includes hardware components that are transistors. One difficulty in generating a “useful” schematic is that often the generated schematic is not deterministic. That is, two netlists referencing the same hardware components and connectivity, but having a different sequence of listing the hardware components in the netlist will result in two different schematics.
Another difficulty in generating “useful” schematics is that prior art schematic generation tools often generate schematics that are not comparable to a manually drawn schematic. For example, in a manually drawn schematic, designers will often place a number of transistors that combined form a particular logic function near each other in such a manner that the logic function may be easily recognizable to a designer viewing the schematic. Additionally, components should “ideally” be organized so that the flow of current and the flow of signals through the schematic is apparent and that there are a minimum of bends and crossovers in the wires connecting various components.